The present invention relates to a data processor. More particularly, it relates to improvement of a data processor including plural memories and plural arithmetic means for controlling and processing mass data.
A conventional data processor includes arithmetic units for addition, subtraction, multiplication and division, and a hardware engine working as a circuit dedicated to the processor. The hardware engine is, as is disclosed in U.S. Pat. No. 4,782,458 titled "Architecture for Power of Two Coefficient FIR Filter", an arithmetic circuit constructed according to the purpose of the processor and a processing speed required for the purpose. U.S. Pat. No. 4,881,192 titled "One-dimensional Linear Picture Transformer" describes, as the hardware engine, a dedicated circuit in which a network including plural buses and plural arithmetic units are aligned and combined for realizing predetermined processing.
Recently, in accordance with the development of LSI techniques, a processor has been provided with not only conventionally known instructions but also new instructions. For example, in a processor such as Pentium II manufactured by Intel, which is provided with a new instruction designated as a "multimedia instruction", arithmetic units used therein have attained more and more improved features, and such a processor can execute various processing such as image processing and speech processing without using the hardware engine at a certain processing speed. The hardware engine is necessary, however, when a high processing speed is required.
A recent processor including plural memories, plural arithmetic units and a network, namely, a processor designated as a "media processor" such as Mpact manufactured by Chromatic Research and Trimedia manufactured by Philips, has become able to realize plural types of processing (multimedia processing), such as two types processing of image processing and speech processing, at a high speed. Such a media processor for executing, for example, the two types of processing of image processing and speech processing, is required to be provided with a hardware engine in accordance with these processing and a desired processing speed.
However, a media processor for executing, for example, the image processing and the speech processing includes a hardware engine different from that of a media processor for executing other plural processing. Accordingly, plural media processors for executing different processing include different hardware engines correspondingly to their executable processing, and there arises a problem that a variety of types of processors are required to be designed.